Recently, a method for executing data processing while sequentially switching logic to be configured in a programmable device, such as a field-programmable gate array, in which logic is dynamically reconfigurable has been proposed. For example, the data processing is executed by a plurality of preceding circuits for executing a plurality of pre-processes and a succeeding circuit for executing a post-process using the results of the plurality of the post-processes, in a certain case. In this case, implementation methods of different types that are to simultaneously configure at least any of the preceding and succeeding circuits are prepared in advance, and a method for configuring circuits of which the size is the smallest is selected from among implementation methods in which data processing is completed within a target time period. When t is difficult to complete the data processing within the target time period, multiple logic components supported for the selected implementation method are configured in the programmable device and execute the data processing in parallel (refer to, for example, Japanese Laid-open Patent Publication No. 2011-203920).
When two circuits, which are connected to each other in series, are alternately configured and execute data processing, a succeeding circuit receives results of data processing that have been sequentially output from a preceding circuit and starts to execute next data processing, thereby reducing a time period to a time at which the last result of the processing is obtained (refer to, for example, Japanese Laid-open Patent Publication No. 2002-26721).
Since a plurality of circuits are sequentially configured based on the order of data processing and the respective circuits start to execute the data processing in the order of the configuration of the circuits, the circuits are configured in parallel with the data processing, thereby increasing the speed of the data processing, compared with a case where a plurality of circuits is collectively configured (refer to, for example, Japanese Laid-open Patent Publication No. 2011-186981).